Request to revise ECGR 4181/5181

Date: October 8, 2009
To: College of Engineering
From: Julie Putnam, Administrative Assistant to Faculty Governance
Approved On: October 6, 2009
Implementation Date: 2009

Note: Deletions are strikethroughs. Insertions are underlined.

Catalog Copy

ECGR 4181. Computer Architecture Arithmetic. (3) Crosslisted as ECGR 5181. Prerequisite: ECGR 3183 or permission of the department. Latest research and development in the area of computer architecture; multiprocessor architecture, multi-computers, interconnection networks, branch prediction, instruction-level, data-level and thread-level parallelism, and memory hierarchy; high-performance machines and special purpose processors. Principles, architecture, and design of fast two operand adders, multi-operand adders, standard multipliers and dividers. Cellular array multipliers and dividers. Floating point processes, BCD and excess three adders, multipliers and dividers.

ECGR 5181. Computer Architecture Arithmetic. (3) Prerequisite:ECGR 3183 or permission of the department. Latest research and development in the area of computer architecture; multiprocessor architecture, multi-computers, interconnection networks, branch prediction, instruction-level, data-level and thread-level parallelism, and memory hierarchy; high-performance machines and special purpose processors. Principles, architecture and design of fast two operand adders, multioperand adders, standard multipliers and dividers. Cellular array multipliers and dividers. Floating point processes, BCD and excess three adders, multipliers and dividers. Credit will not be given for ECGR 5181 where credit has been given for ECGR 4181. (On demand)